The present invention relates to a semiconductor integrated circuit capable of suppressing the occurrence of a malfunction to be intentionally induced with light irradiation, and also to a data processing system using the same. In particular, the present invention relates to a technique that is effectively applicable to a microcomputer embedded in an IC card, for example.
A microcomputer embedded in an IC card to be used for such a purpose as user authentication (called a security microcomputer) might be subjected to a fault-based attack that intentionally induces a malfunction or faulty condition for illegally obtaining or tampering with secret information held in the IC card. For intentional induction of a malfunction in the security microcomputer, an abnormal power supply voltage, a clock signal having an excessively high frequency, a beam of laser light irradiation, or the like is applied thereto. A fault-based attack using laser light irradiation is regarded as one of the most serious security threats since a malfunction can be forced to occur in a local portion. Recently, there has been an increasing demand for security protection against a fault-based attack using laser light irradiation, and most of the security microcomputers are provided with a protective circuit against laser light irradiation in an illegal attack attempt. As a countermeasure against laser light irradiation, there is a technique using photodetector elements for detecting laser light irradiation. Since the mounting of a multiplicity of photodetector elements on a chip is required for detection of local laser light irradiation, it is desired to provide small-sized photodetector elements having excellent sensitivity of detection.
In Patent Document 1 indicated below, there is disclosed a semiconductor integrated circuit using photodetector elements having an npnp thyristor structure. Further, in Patent Document 2 indicated below, there is disclosed a circuit configuration wherein a plurality of MOS transistors are coupled between an input line and a ground line of a reset circuit for generating a reset signal, and an output terminal of each photodetector element is coupled to a gate of each MOS transistor.